University of Twente Student Theses
Compiling a RISCV extension for Skyrmion Racetrack Logic-in-Memory using the Clang Compiler
Deinse, L.S. van (2025) Compiling a RISCV extension for Skyrmion Racetrack Logic-in-Memory using the Clang Compiler.
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| Abstract: | Modern memory has not improved as much as processors, creating the memory wall. Moving data to and from memory is limiting performance, and a possible solution is performing the computation inside the memory itself. There are already quite a few studies into new memory technologies, but programmable support for these new structures is still lacking. One such architecture is called racetrack, a type of non-volatile memory storing data in a nanowire. It is of particular interest due to its high density, low power consumption and fast access times. However, to integrate such memory into real-world applications, a complete compilation flow is essential. Without it, developers must rely on manual code transformations or custom toolchains, making it more difficult to program, optimize or debug. Therefore, this work focuses on creating a RISC-V extension in clang for a (skyrmion) racetrack memory that is capable of performing bitwise AND operations. The final implementation requires some manual intervention for more complicated modifications, but can be simulated using gem5 and RTSim. |
| Item Type: | Essay (Master) |
| Faculty: | EEMCS: Electrical Engineering, Mathematics and Computer Science |
| Subject: | 54 computer science |
| Programme: | Embedded Systems MSc (60331) |
| Link to this item: | https://purl.utwente.nl/essays/106287 |
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