University of Twente Student Theses


Design of application specific high bandwidth Nyquist DAC

Wei, Z. (2008) Design of application specific high bandwidth Nyquist DAC.

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Abstract:Digital-to-analog (DAC) converters translate digital codes into different physical quantities in voltage, current or charges. They are used either as a stand alone functional block in a big system or as a subsystem in analog-to-digital (ADC) converters. The DAC in this project is a subsystem in a two-step subranging like ADC. The application specific DAC is also named as internal DAC in this master report, meaning dedicated DACs in ADC systems. The main goal of this research is to find a high bandwidth internal DAC system that exploits the fact that no SFDR requirement is given and latency is allowed so that a very high signal to noise ratio (SNR) is present at the output during the sampling moment of the ADC. The internal DAC has the following characteristics: low resolution, 2GS/s, and 13-bit accurate reproducibility. Besides that, the optimum output (current, voltage, or charge) needs to be determined when integrating internal DAC itself with subtractor. Different types of internal DACs, including resistive string, R-2R, capacitive, and current steering types, are examined in terms of reproducibility, speed, power consumption, and noise performance. Universal causes to speed and reproducibility present in all types of DAC are identified: speed limitation is RC settling, and reproducibility limitations are memory effect, signal jitter, digital feedthrough, noise, and switching control signals. Noise is the most dominant factor determining the reproducibility. With the same capacitive load (100fF), comparisons between different DACs are made: current steering DAC has the most output noise, capacitor DAC for largest chip area and highest reproducibility, resistor string DAC for largest power consumption. But the design may come down to one form of output signal (voltage) and one topology (resistive) after taking into account integrating internal DAC with the subtractor. The chosen DAC achieves 2GS/s and 10-bit reproducibility (differential). 13-bit reproducibility can not be achieved due to the required settling speed and input matching requirement.
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:53 electrotechnology
Programme:Electrical Engineering MSc (60353)
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