Hardware Accelerator Sharing within an MPSoC with a connectionless NoC
Author(s): Wevers, Gerben G.A. (2014)
Abstract:
For the last decades, increasing the computational performance of a microprocessor chip was mainly achieved by scaling transistor sizes. Not only can more transistors be placed in a single die, smaller transistors allow higher clock frequencies. While transistor sizes are still decreasing, designers are facing mayor power consumption issues which prevent further performance improvements by simply increasing clock frequencies. A clear trend is visible where multiple cores are added to the same chip to form so-called multi-core systems. The same trend is visible in the embedded systems domain where System-on- Chips (SoCs) are transformed into Multi-Processor System-on-Chips (MPSoCs).
Document(s):
Wevers_MA_EEMCS.pdf