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Specification of aperitif polyphase filter bank in cƛash

Sarakiotis, D. (2012) Specification of aperitif polyphase filter bank in cƛash.

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Abstract:The complexity of nowadays architectures has made the traditional hardware description languages inadequate and the need of having a more abstract description of the hardware a necessity. Therefore the exploit of any possible high level abstraction mechanism is more than just a luxury but has become necessary. Functional hardware description languages are a class of languages specialized in hardware descriptions which exploit the ability to express higher level structural properties, such as parameterization and regularity. Due to features as higher-order functions and polymorphism, parameterization in functional hardware description languages becomes easier than in other hardware description languages, like VHDL. In the CAES group at Twente University a new functional hardware description language, Cλash, has been developed. Cλash borrows both the syntax and semantics from the general-purpose functional programming language Haskell. In this Thesis the APERTIF Polyphase Filter Bank, which has been used at the LOFAR telescope, is being attempted to be implemented using Cλash. The Filter Bank as part of the Beam-Former of the LOFAR telescope serves as a spectrum analyzer. It mainly consists of a FIR Pre-Filter Structure for complex inputs and a complex FFT. The particular Filter Bank has been chosen due to its complexity and its subcomponents which provide a suitable case study for the exploit of high level abstraction in hardware designing procedures and the use of functional HDLs. The primary goal of this Thesis is to investigate whether or not Cλash, as a newly developed language, can be used to specify and describe complex architectures, like an FFT, a Filter Bank etc. As a second goal, a list with the most important attributes that can be improved, so that Cλash will evolve in a more dependable and adequate HDL which can be used in more complicated and demanding designs, should be derived. Additionally, if time allows, a comparison should be performed between the traditional design approach, which is being followed by the more common HDL languages (VHDL, Verilog), and the functional approach, which is being followed by the functional HDLs (Cλash, Lava).
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:53 electrotechnology
Programme:Electrical Engineering MSc (60353)
Link to this item:http://purl.utwente.nl/essays/69502
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