University of Twente Student Theses
Design of an N-Path Bottom-plate Mixer with Sampled Outputs
Trullas Clavera, B. (2017) Design of an N-Path Bottom-plate Mixer with Sampled Outputs.
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| Abstract: | The interest in the design of receivers that can process multiple wireless standards is increasing, as new standards emerge whilst still expecting smaller devices. Attempts are made to bring the ADC closer to the antenna, replacing analog systems by digital blocks, which are highly scalable with technology. Moreover, digital functions are highly programmable, and the different standards could be processed with a single front-end. This work designs a circuit capable of sampling the RF signal received by the antenna and opens the possibility to connect it directly to the ADC. The N-path Sampler presented includes RF-sampling, down-conversion, bandpass filtering, I/Q demodulation and amplification functionalities. The centre frequency of the filter/mixer is programmable by varying the clock signal that controls the switches. It is implemented with passive elements, making it highly integrable. Some concerning issues are harmonics folding, impedance matching, noise and low SFDR. Posterior discrete time processing of the signal would be a solution for some of these issues. However, previous anti-alias filtering will be necessary to suppress the folding of LO harmonics. The time variant nature of the Bottom-plate sampled mixer adds difficulty in the derivation of its transfer function. Using the Adjoint Network Method a mathematical model of the transfer function is derived. This model shows a maximum of 1.2 dB of relative error in the bandpass when compared to Cadence simulations. Simulations with 65nm CMOS technology show a good functionality of the circuit. Contrarily to similar circuits published, this N-path filter based sampler presents a simulated voltage gain of GV = 5dB. Simulations show good linearity, providing a third and second order input referred intercept points of IIP3 = 17:6dBm and IIP2 = 65dBm at 400MHz offset. Moreover, the measured -1 dB compression point due to an out-of-band blocker at 200MHz offset, is B-1db = 10dBm. The average out-of-band signal suppression is 27dB but there is folding from RF-frequencies around the odd harmonics of the switching frequency. Finally, an estimate of the power consumption is calculated: 380μW for a 1.2V of supply voltage, 10 Ohm switch resistances and a 1GHz switching frequency. |
| Item Type: | Essay (Master) |
| Faculty: | EEMCS: Electrical Engineering, Mathematics and Computer Science |
| Subject: | 53 electrotechnology |
| Programme: | Electrical Engineering MSc (60353) |
| Link to this item: | https://purl.utwente.nl/essays/74153 |
| Export this item as: | BibTeX EndNote HTML Citation Reference Manager |
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