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A Built-In Self-Test as a Countermeasure for Fault Injection Attacks on Cryptographic Devices

Redonet Klip, T.H. (2018) A Built-In Self-Test as a Countermeasure for Fault Injection Attacks on Cryptographic Devices.

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Abstract:Field Programmable Gate Arrays (FPGAs) provide an efficient platform for cryptographic hardware implementations with many advantages. However, any safety-critical circuit implemented on an FPGA must be protected against Fault Injection Attacks (FIAs) [1]. Here, the attacker disturbs during the operation the cryptographic component in such a way at defined times that conclusions about the key can be drawn. This indicates that there is a need for security on cryptographic devices. This research intents to find an effective protection mechanism against fault injection attacks. A Built-In Self-Test (BIST) is successfully implemented on an FPGA. Existing countermeasures try to deflect the fault injection which is not always successful and most of the time only work for one type of fault injection. However, the BIST legitimates the encryption algorithm before it encrypts the actual input text. For this reason, the BIST can counter several types of fault injection attacks and can counter very advanced attacks on the bitfile of the FPGA. A trade-off between the overhead and security can be made since the designer can choose on which intervals the BIST is activated. This can be further optimized by doubling the clock frequency of the encryption process in order to minimize the timing overhead.
Item Type:Essay (Bachelor)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:53 electrotechnology
Programme:Electrical Engineering BSc (56953)
Link to this item:http://purl.utwente.nl/essays/75288
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