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User-controlled routing to implement configurable delay elements in FPGAs

Aanen, A.M. (2019) User-controlled routing to implement configurable delay elements in FPGAs.

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Item Type:Essay (Bachelor)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:30 exact sciences in general, 53 electrotechnology
Programme:Electrical Engineering BSc (56953)
Link to this item:https://purl.utwente.nl/essays/79754
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