University of Twente Student Theses
Accelerating the SCION IP Gateway using programmable data planes
Kellaway, M.C. (2022) Accelerating the SCION IP Gateway using programmable data planes.
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| Abstract: | This work focuses on performance accelerating the SCION IP Gateway (SIG) using Open Programmable Data Plane (OPDP) technologies. SCION is a new clean slate Internet protocol with the goal of increasing scalability, control, transparency and security. SCION achieves these goals primarily by encoding the packets’ path inside the packet header and cryptographically signing and verifying this path. The SIG is used to enable communication between IP-based hosts and SCION-based hosts. The SIG needs to be performance optimised since many IP-based end-hosts will send their traffic to the SIG, resulting in traffic aggregation at the SIG due to the many-to-one connection. An OPDP is an open-source data plane written in code resulting in transparent data plane behaviour. We define three possible spaces for OPDPs, the hardware space, the kernel space and the user space. Each space brings along a variety of possible programming languages. For the hardware space, we consider P4 with the Intel Tofino architecture. We consider eBPF an in-kernel virtual machine for custom in-kernel code execution with the eXpress Data Path (XDP) and Traffic Control (TC) networking hooks for the kernel space. The current open source SIG implementation is a user space OPDP written in Go. We have performed a literature study on the performance of OPDPs and SCION. To the best of our knowledge, at the time of writing, we are the first to perform measurements on the SIG performance and to accelerate the SIG since we did not find any literature on the performance or acceleration attempts of the SIG. To determine which OPDP is best suited for the acceleration, we tried to develop prototypes for a P4-based (hardware space), XDP-based (kernel space) and TC-based (kernel space) SIG. The TC-based SIG implementation was the only functioning prototype. The P4-based SIG could not perform the required reassembly operations. An XDP-based OPDP was incompatible since XDP programs could not be connected to the ingress side of interfaces, a requirement for correctly redirecting the packets. We have created an automated virtualised test setup for performance measurements on SIGs. We perform the measurements on the user space SIG and our TC-based SIG. We analyse RTT to determine the processing delay caused by the SIG and analyse throughput to assess the maximum forwarding speed. Our analysis shows a 64% throughput increase whilst reducing the average latency by 45% and the CPU utilisation by 99% for the TC-based SIG compared to the user space SIG. Therefore, we show that accelerating the SIG is possible using a TC-based OPDP resulting in higher throughput and lower RTT whilst reducing the CPU load. However, there still is room for improvement of the TC-based SIG supported by our measurement results and future work ideas. |
| Item Type: | Essay (Master) |
| Clients: | SIDN, Arnhem, Netherlands |
| Faculty: | EEMCS: Electrical Engineering, Mathematics and Computer Science |
| Subject: | 54 computer science |
| Programme: | Embedded Systems MSc (60331) |
| Link to this item: | https://purl.utwente.nl/essays/93101 |
| Export this item as: | BibTeX EndNote HTML Citation Reference Manager |
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