Towards interconnecting dopant networks

The research field of artificial intelligence is growing fast. Especially, the subfield of machine learning where artificial neural networks are used as models to predict complex behaviour. These networks are becoming more complex and demanding of computation resources resulting in a need for optimized hardware. Neuromorphic computing deviates from standard computation methods and takes inspiration from neuro-biological architectures. Research into neuromorphic computing has shown that a disordered network of dopant or acceptor atoms in silicon can be used to solve classification problems. This disordered network, also called a dopant network processing unit (DNPU), can be combined into networks to solve more complex problems. In this work, we show the computational advantages of using batch normalisation with DNPUs and the subsequent implementation of normalisation in between DNPU network layers. This thesis also proposes and analyses three slightly different methods to implement normalisation in hardware. One of these designs is chosen and implemented in a measurement setup which brings us closer to a DNPU based hardware network.