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A Reconfigurable Architecture of Software-Defined-Radio for Wireless Local Area Networks

Kapoor, A. (2005) A Reconfigurable Architecture of Software-Defined-Radio for Wireless Local Area Networks.

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Abstract:The Software-Defined-Radio (SDR) project at the University of Twente aims at combining two different WLAN standards, Bluetooth and HiperLAN2, on one common flexible hardware platform. A functional architecture SDR baseband receiver has already been derived which is capable of receiving both OFDM and phasemodulated signals [39]. The scope of this MSc. project is to design and implement an ASIC-like reconfigurable hardware for a part of this architecture. This project involves the estimation of computational complexities of various subblocks of the two receivers. These results are used for the identification of subblocks with similar computational complexities in the two receivers. The FIR and FFT blocks, for Bluetooth and HiperLAN2 respectively, are identified as the most computationally intensive parts and have been further analyzed for computational requirements and hardware implementation in the two receivers. A coarse-grained, dynamically reconfigurable, tile-based hardware architecture is proposed to implement the algorithms. There are nine autonomous tiles (data processing elements) in the system. The autonomous nature of a tile allows easy scalability and testability of the system. The architecture implementation and algorithms mapping is done using SystemC via Synopsys CoCentric System Studio. The design is done using 16-bit fixed-point data format and is compared with the floating point software implementation. Synthesis results show that design consumes 0.59 mm2 area and can run at 188 MHz maximum frequency in 0.18¿ UMC CMOS process. The proposed implementation is compared with the implementation on the Montium tile processor [26], designed under the Chameleon project [1], in terms of speed and area. This comparison shows an area reduction of about 15 times in our design compared to the Montium TP based implementation. This reduction comes at the expense of limited flexibility. The FFT implementation in this thesis is also compared with various other FFT implementations. This comparison shows a performance/flexibility trade-off between these implementations. An area reduction of about 25-30 percent can be made in the combined implementation compared to the individual implementations of the two receivers. The datapath of the Bluetooth receiver can be used for the OFDM system without much overhead. The memory and the memory-bandwidth of the OFDM system can be used in the Bluetooth receiver without any overhead. These results can be used to estimate the overhead required to accommodate the Bluetooth receiver in the Hiper-LAN2 system.
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:53 electrotechnology
Programme:Electrical Engineering MSc (60353)
Link to this item:http://purl.utwente.nl/essays/56312
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