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High speed FPGA based scalable parallel demodulator design
Beekhof, H.M. (2017) High speed FPGA based scalable parallel demodulator design.
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| Abstract: | Nowadays applications have to process data at high data rates. These data rates are increasing faster than the frequencies on which Field Programmable Gate Arrays (FPGAs) operates. In this thesis a parallel design is presented so that the FPGA still can be useful to process data at high rates. |
| Item Type: | Essay (Master) |
| Faculty: | EEMCS: Electrical Engineering, Mathematics and Computer Science |
| Subject: | 53 electrotechnology |
| Programme: | Embedded Systems MSc (60331) |
| Link to this item: | http://purl.utwente.nl/essays/72304 |
| Export this item as: | BibTeX EndNote HTML Citation Reference Manager |
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