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FPGA-based AES variants against side-channel attacks

Kerimov, Emil (2020) FPGA-based AES variants against side-channel attacks.

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Abstract:FPGA-based designs are susceptible to a special type of cyberattacks called side-channel attacks - power analysis in particular. These attacks rely on the phenomenon that power consumed in digital electronic circuits is correlated to the data being processed by that circuit. Statistical analysis of repeated measurements of power consumed may reveal secret data used by the circuit. FPGAs can dynamically switch between configurations of the design that maintain functional integrity but have different power consumption profiles. Thus, the correlation between power and data during the statistical analysis is distorted. This may lead to an increase in the number of measurements and analysis time. In return, making the attack less feasible. An open-source synthesis tool is used to generate design variants of an FPGA-based Advanced Encryption Standard (AES). Synthesis-level modifications are introduced and evaluated on a Xilinx Zynq Ultrascale+ based test setup. Effectiveness of the generated variants is measured by performing a Correlation Power Analysis (CPA) attack on the collected data. A 10-12x increase in the number of measurement is shown compared to 3-4x in the related literature.
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:50 technical science in general, 53 electrotechnology, 54 computer science
Programme:Electrical Engineering MSc (60353)
Link to this item:http://purl.utwente.nl/essays/82246
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