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Design Reconstruction for Partial Reconfigurable FPGA Systems

Haar, J. ter (2021) Design Reconstruction for Partial Reconfigurable FPGA Systems.

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Abstract:This work proposes an automated tool for verification and design reconstruction for PR systems. The verification part checks if a given set of modules is compatible with each other and the static system. A fully placed and routed netlist is obtained by merging reconfigurable modules back into the static design. Since place and route constraints must be kept, the merge is done on a netlist level. The so-called design reconstructing takes care of this merge process. The logic of the modules that belong to a specific configuration is placed into the partial region of the static system and interface nets are reconnected. We end up with a fully placed and routed design on which a timing analysis and functional simulation can be performed.
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:54 computer science
Programme:Embedded Systems MSc (60331)
Link to this item:http://purl.utwente.nl/essays/88543
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