University of Twente Student Theses


On Productive, Low-Level Languages for Real-World FPGAs

Staal, P.J. (2022) On Productive, Low-Level Languages for Real-World FPGAs.

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Abstract:In this master thesis we set out to design and develop a productive, low-level FPGA design language. A productive language offers designers abstractions such that complex designs can be defined efficiently and elegantly. Low-level languages offer major control over how exactly the program text is translated to the target architecture. Consequently, in a low-level language the target architecture is in a certain way visible to the designer. To anchor this research in reality, we additionally required the language to work for a real FPGA chip. No current language for FPGAs fulfills these criteria. The design and implementation of such a language have shown what difficulties must still be overcome to realize a production-ready productive low-level language. However, it has also shown that modern tools enable the development of such languages while this used to be impossible.
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Subject:54 computer science
Programme:Embedded Systems MSc (60331)
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