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Comparing communication network topologies for low power microcontrollers

Matena, D.H. (2022) Comparing communication network topologies for low power microcontrollers.

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Abstract:This research discusses the design and evaluation of two communication network topologies, in which the ESP32 microcontroller is used as a network node. These networks are designed to create a communication system across multiple Electric Vehicle (EV) charging stations. The investigated topologies are the hierarchical network and the mesh network. These network topologies are evaluated on multiple aspects: the hardware usage (RAM and Flash storage), the time needed for a node to send data, the time needed for an entire send and receive cycle and the effects of the network size on those timings. The hierarchical network is faster with sending data than the mesh network and the hierarchical uses less RAM as well, but the mesh network is more suitable for the communication system, because of network robustness.
Item Type:Essay (Bachelor)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Programme:Electrical Engineering BSc (56953)
Link to this item:https://purl.utwente.nl/essays/90701
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