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Observability of off-the-shelf microarchitectures based on the RISC-V Instruction Set Architecture

Huffelen, W.G.H. van (2023) Observability of off-the-shelf microarchitectures based on the RISC-V Instruction Set Architecture.

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Abstract:Fast and low-cost development is becoming more important for the space industry with a greater need for communication infrastructure in space. Commercially off-the-shelf(COTS) components already have been widely used in industry,and with the raise of RISC-V core architectures as off-the-self core that can be deployed. How can we evaluate if a core is reliable in hazardous conditions? To characterize these cores, this paper looks at the observability problem within irradiation campaigns. With the use of fault injection in simulation and error modeling, an approximation is made to characterize the Ibex RISC-V core and its behavior before the real experiment. The experience and data from the irradiation campaign are then used to improve and verify the simulation strategy. The preparation for the experiment is faced with many practical challenges that are less dominant in simulation. The biggest bottleneck is the interface and transmission of data between the Device under test (DUT) and the host observer.
Item Type:Essay (Master)
Faculty:EEMCS: Electrical Engineering, Mathematics and Computer Science
Programme:Embedded Systems MSc (60331)
Link to this item:https://purl.utwente.nl/essays/94537
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