Measurement protocol for stress induced leakage current in MOS-capacitors

Stress induced leakage current (SILC) has two known parts, a steady state current and a transient current. The steady state current mainly dominates the negative impact of SILC on metal oxide semiconductor (MOS) devices such as MOS-capacitors. Therefor the steady state current needs to be isolated from the transient current. In this paper the transient current of SILC post stressing and post annealing is investigated. Subsequently, a new measurement protocol is established for performing SILC measurements where the steady state current is isolated from the transient current, by applying a zero volt bias step post stress and post annealing. The new measurement protocol is tested, showing the transient current is only present post stress and does not occur post annealing. Applying the zero volt bias step in the measuring protocol post stress positively affects the behaviour of the capacitor, by removing the transient current almost completely. It reduces the transient effect of the SILC current between 50% and 72%. SILC measurements post annealing are not affected by the transient current and therefore the zero volt bias step is not necessary.