Handling gate leakage in FDSOI CMOS for a Passive Discrete-Step Attenuator

In this paper an Operational Transconductance Amplifier (OTA) circuit is proposed that handles the spread in gate voltage and on-resistance, due to gate leakage and process variation, of RVT transistors bootstrapped with an RVT transistor to improve IM2- and IM3-distortion cancelling in the 22nm FDSOI CMOS technology of GlobalFoundries. The circuit is designed and simulated in the Cadence environment. The final proposed circuit is singe-supply, low-power and operates in subthreshold. The spread in gate voltage and on-resistance with process variation has been reduced. However, the distortion cancelling has degraded due to parasitics of transistors and the bandwidth of the OTA.